Quantcast
 Loading...in few seconds...

Click to Call Toll Free: (800) 339-9171
8:00AM EST - 8:00PM EST Mon. to Sat.






Tech Support

Knowledgebase Home | Glossary | Favorites | Active Contact Bot | Login Knowledgebase Home | Glossary | Favorites | Active Contact Bot | Login
Search the Repository


[Advanced Search]
Browse by Category
Active Response Bot:
Enter your question into the text-box below. Example: Power Inverter, or Solar Panel. If you consider you can be very specific. Wait for system to replay back to you. A popup window will deliver the list of possible answers. The process will take less than 5 seconds.
 
not searching

Continue
To get updates and be present in conversations follow us on LinkedIn using LinkedIn blue ribbon connector!

101 renewable - pv solar panels and electric power generation (part 2)

Article Details

Last Updated
6th of January, 2020

USER OPINIONS
(22 votes)
100% thumbs up 0% thumbs down
How you rate?

PV solar panels are characterized by the PV cell used materials, electrical parameters, esthetic factor. Terrestrial PV panels are made of Monocrystalline or Polycrystalline cells and in some applications like thin-films, of an Amorphous Silicon (a-Si or a-Si:H) cell material.

Read Article:   101 Renewable - PV Solar Panels and Electric Power Generation(PART 1)

Solar cells material, respective PV panel layout and electrical design are the defining attributes. Most of the residential installations have 600Vdc PV solar panels. Some residential installations and most of the commercial installations are equipped with a 1000Vdc PV solar panels.

Solar Panel Components Explosion

1000Vdc PV panels NEC Code Considerations:-

A PV panel is built in a layer of components where the PV cells are encapsulated in a configuration with 60 or 72 Cells wired at 600Vdc. For higher efficiency with important installation cost reductions, some of the panels are wired at 1000Vdc in a 72 cells configuration. The total installation costs can be almost halved using 1000Vdc PV panels. 1000Vdc PV panels must be used in correlation with NEC code considerations.

The National Electric Code (NEC) covers photovoltaic systems, but does not specify a maximum voltage except for residential applications in Article 6907 (C).
Article 690.7 (C) — Limits systems to 600Vdc on one- and two-family dwellings; For multi-tenant dwellings over two units and commercial sites with systems over 600Vdc shall comply with article 690 Part IX.
Article 690 Part IX (section 690.80) — Requires that PV systems over 600Vdc comply with Article 490.
Article 490 — while not written explicitly for PV systems, requires use of UL-listed components when installing systems over 600Vdc.

PV cells and PV solar panel design:-

This expose will focus on PV panel and PV wafer cell design having as heavy point the name plate coefficient of efficiency .

Most of the solar panels used are either Monocrystalline (mono) or Polycrystalline (Poly) type. PV solar panels are made of wafer-cells connected in different configurations; PV panels collect light generated current through Bus-Bars with attached Fingers placed along them.

Solar Panel Mono - Poly

Every solar cell has a front and a rear contact. The front section is a N -Si doped area which will act as an emitter (is generating negative charged carriers), the rear is a P -Si doped area which will act as a base for recombination between electrons and holes (is generating positive charged carriers as elements of recombination). The intersection between front and rear constitutes the P-N junction, a barrier where the process of generating electrical current through different potential charged carriers occurs. On the front (N-Si doped area) is an electrical layout consisting of Bus-Bars and Fingers connected to Bus-Bars. They channel the electrons towards the PV panel contacts.

Wafer Cell Layout

The light is caring energy in photon particles which are partial absorbed into the wafer-cells. During the process of absorption, the photon separates in electrons (negative charged carriers) and holes (positive charged carriers). Electrons obtained from photons are colliding with electrons from already doped N-Si layer. The already existing electrons will gain in energy value, they will jump on a higher energy band, and from there they will become free and start to move towards PV panel contacts building up a DC current. The process of building up DC current will continue for the period of time light is absorbed by solar wafer-cells. The current of electrons will come back through the base of the silicon wafer-cells and will recombine with holes (positive carriers). Only a residual number of electrons will cross the P-N junction at cell level maintaining the front of the cell with an excess of electrons (negative carriers).

Wafer Cell How Works

In this expose when we refer to solar cells design, we target almost exclusive solar cell efficiency factor. The theoretical efficiency for photovoltaic conversion is in excess of 86.8%. For silicon solar cells, a more realistic efficiency is about 29%. The maximum efficiency measured for a silicon solar cell is currently 24.7%.

In designing a PV solar cell we follow efficiency coefficient improvements through:
  increasing the amount of light absorbed by the wafer-cell, that is broke into electric carriers (electrons and holes);
  increasing the collection of light-generated carriers by the P-N junction;
  minimizing the forward bias dark current;
  minimizing resistive losses - extracting the current from the cell with minimum resistive losses.

Let’s talk about each individual method listed above.

Increasing the amount of light collected by the cell:-

Optical Interference - to increase the amount of light collected by the solar cells we refer to optical interference between the cell and the incident light waves. As a result of light coming in contact with the surface of the wafer the light wave is partial absorbed into the cell in a refraction process, and partial is reflected back to outsides. What we look for is the refracted component to be bigger and to travel for a longer optical distance inside the wafer.

Wafer Cell Principles Explosion

DLARC - Double Layer Anti Reflection Coatings is one of the solutions most used to improve the efficiency. Popular DLARC coatings are zinc sulfide (ZnS) with magnesium fluoride (MgF) or layers of silicon nitride with varying refractive index. The layers are usually deposited on a textured substrate to decrease the reflectivity further.

Increasing the collection of light-generated carriers:-

Surface Texturing - any "roughening" of the surface reduces reflection by increasing the chances of reflected light bouncing back onto the surface, rather than escaping out towards surroundings.

Wafer Surface Texturing

Thicker wafer-cells - to enable a longer optical distance, and in this way to collect more electric charged carriers we use either thicker wafer-cells or we place a reflector on the cell rear to double the optical length of the refracted light.

Light Trapping - an optimum solar cell structure will typically have "light trapping" in which the optical path length is several times the actual device thickness. The optical path length of a device refers to the distance that an unabsorbed photon may travel within the device before it escapes out of the device.

Wafer Light Trapping

Minimizing the forward bias dark current:-

What is the forward bias dark current: P-N junction of a wafer without illumination has a residual current called bias dark current. The residual current is generated in a forward polarization between the front (junction cathode) and rear (junction anode). Bias dark current is the P-N junction saturated current. Usually a wafer cell let such a current to flow only when the injection barrier voltage potential is overcome and no light is present in a direct polarization of the wafer, respective PV panel. This dark current (dark because is not direct photovoltaic and is not light dependent) will be considered as an intrinsic residual component affecting both Isc and Voc, and increasing the recombination losses. The dark current presence affects the general output of the wafer respective PV panel, and it is reducing the efficiency factor.

Forward Bias Dark Current

Minimizing the resistive losses:-

Current Losses due to Recombination - In order for the silicon wafer (a P-N junction) to be able to collect all of the light-generated carriers, both surface and bulk recombination must be minimized. We have to consider that photons come with different energy in correlation with light wave spectrum ( from blue light to infrared). Because of that, some carriers are covering a longer light distance inside the wafers after they refract. That reduces the number of individual charged carriers, and reduces the Isc value. Using different material texturing, material thickness and rear reflection we can obtain better solar cell efficiency with a higher Isc value.

PV P-N Junction Losses

Voltage Losses due to Recombination - The recombination is controlled by the number of minority carriers at the junction edge, how fast they move away from the junction and how quickly they recombine.

Consequently, the dark forward bias current, and hence the open-circuit voltage, is affected by:
  number of minority carriers at the junction edge;
  diffusion length in the material;
  presence of localized recombination sources within a diffusion length of the junction

The way to reduce voltage losses due to recombination are:
  increasing the doping of p-n junction;
  high diffusion length;
  passivating the surfaces

Solar wafer-cell Bus-Bars layout configuration based on efficiency factor:-

The final condition necessary to design a high efficiency solar cell is to minimize parasitic resistive losses. Both shunt and series resistance losses decrease the fill factor and efficiency of a solar cell. The emitter is covered by a top grid consisting of the Fingers and Bus-Bars dominating the overall resistance.

The metallic top contacts are necessary to collect the current generated by a solar cell. Bus-Bars are connected directly to the external leads, while Fingers are finer areas of metallization which collect current for delivery to the Bus-Bars.

Solar cell Bus-Bars:-

Silicon solar cells are metalized with thin rectangular-shape strips printed on the front and back sides of a solar photovoltaic cell.

Wafer Bus-Bars Config

These metallic contacts are called Bus-Bars and have a significant purpose: they conduct the direct current generated by the solar photovoltaic cell.

Frequently, solar cell Bus-Bars are constructed from copper, coated with silver. The silver coating is necessary to enhance current conductivity (front side) as well as to lower oxidization (rear side).

Solar cell Fingers:-

Perpendicular to the Bus-Bars are the metallic and thinner grid Fingers, also called solar cell Fingers, which collect the very initial generated current for the purpose of delivery to the Bus-Bars.

Wafer Fingers and BB

These contacts – the Bus-Bars and the Fingers – are printed onto the surface of solar photovoltaic cell via a technology called screen printing.

A higher number of Bus-Bars reduces the effective finger length between the Bus-Bars, which in turn decreases finger resistance losses, as well as the impacts of micro-cracks.

What are solar cells micro-cracks? - Solar cells are made of very thin wafers, usually about 0.20 mm thick. They have some flexibility but can suffer from pressure induced cracks which are so small they are impossible to see with the eye. These are called micro-cracks.

The most common solar cell design involves three Bus-Bars (3BB) printed onto the cell. Five Bus-Bars (5BB) cells are currently one of the leading trends in solar cell design.

Some sizeable solar panel manufacturers, such as Trina Solar, SolarWorld, and CSUN, increasingly focus their manufacturing on PV solar panels using P.E.R.C. solar cells with 5BB Bus-Bars. The multi Bus-Bars design with thinner Bus-Bars also enables a cost reduction of the expensive silver paste.

Solar Panel Back-Sheet effect on efficiency factor:-

A solar panel back-sheet is the white plastic at the back of that solar panel. They are vital for providing physical protection against wind-blown dust and debris and, most importantly, they prevent water getting in and ruining the panel. The material has to be waterproof and long lasting, as most solar panels have performance warranties of 25 years. Solar panel back-sheets are usually white between solar cells and they do reflects sunlight. The back-sheet helps the PV panel to become a little cooler and this will improve efficiency. Some defects of the back-sheet will affect solar panel life span and efficiency. All depends of the manufacturer of the back-sheet. Best back-sheet on the market is made by Dupont and is made of Tedlar. The most common back-sheet defects are: yellowing of the cell-side, yellowing of the air-side, cell-side cracking, air-side cracking, and delamination.

Design trends which considerable improve the efficiency coefficient of PV solar panels:-

High Efficiency coefficient improvement within P.E.R.C. PV solar panels:-

P.E.R.C. stands for Passivated Emitter Rear Contact, and refers to the dielectric layer on the back of a P.E.R.C. solar cell.

This layer on the back of the P.E.R.C. solar cells help to reflect light, that passed through the cell, back into the cell and in this way it can generate more electrons. This is also known as backside passivation with internal rear reflector. This is a feature not found with standard MONO and POLY wafer-cells.

PERC Cell

The efficiency gains of P.E.R.C. technology translates into a 5-50W power increase for a 60 cell panel. Besides higher efficiency, P.E.R.C. solar cell technology has a cost advantage as well when labor and mounting hardware are factored in . P.E.R.C. technology is combined with a 5BB or 6BB (BB – Busbar) electric layout to enhance the efficiency factor.

There are three main reasons why the dielectric / rear side passivation layer contributes to the increase of efficiency:
  The extra rear dielectric passivation layer reduces electron recombination;
  The extra dielectric passivation layer increases the solar cell’s ability to capture light;
  The extra dielectric passivation layer reflects wavelengths above 1180 nm out of the solar cell. Those wavelengths would normally create heat, and reduce the efficiency factor.

Some of the manufacturer using P.E.R.C. technology are: Mission Solar; Solarworld, Suntech, Longi.

High Efficiency coefficient improvement with Half Cut PV solar panels:-

Half Cut Cell

Conventional silicon cells have an absolute theoretical maximum efficiency of 29.1%. To improve the efficiency, scientists at M.I.T. and elsewhere have unlocked solutions based on new technologies. One of them is splitting the energy of one photon into two electrons which lies in a class of materials that possess “excited states” called excitons, To obtain that, solar cells are implementing a very thin layer, few atoms thick, which helps with dividing the cell in half and they double the amount of energy produced by a conventional solar cell. The efficiency can reach a max of 35 percent. The technology is called half-cut solar cell technology, and together with 5BB or 6BB (Bus-Bars) electric layout, they are reducing the internal resistance losses and are bringing more to the cell efficiency factor.

High Efficiency coefficient improvement with DOUBLE-SIDED (BIFACIAL) PV solar panels:-

Bifacial solar cells are designed to allow light to enter from both sides. They typically are made with a front surface design similar to that used in industry‑standard screen printed solar cells, Rear part of the wafer-cell is different, It has a Finger grid used in place of a back-sheet to allow sunlight through the rear. In this way a bifacial solar panel it makes use of “Albedo Light

Albedo is a benchmark measure of how much light that hits a surface is reflected without being absorbed from that surface. Light colors and mostly white colors like sand or snow are helping with beam or the diffuse reflection to travel back and to be absorbed on both sides into solar panels increasing the solar panels output.

Double Sided PV Panel

In case of bifacial solar panels we have a front panel current generate by irradiance energy Gfront, and a rear panel current generate by rear irradiance energy Grear. The final value of Grear is corrected by Bifacial coefficient, the Bifi value.

Bifi Total Irradiance

Gtotal = Gfront + (Grear*Bifi)
Where Gtotal, Gfront, Grear are in [ W/m2]

Bifacial solar panels have two way integration: either vertical integration in the ground projects, or a high refractive integration like canopies, pergoals, e.t.c.

Despite advances in solar panels glass used to encapsulate the wafers, a bifacial PV panel is heavier compared to a normal PV panel, and that make it less interesting to be used on residential roof installations.

Some of the advantages in using bifacial solar panels:
  Better performance at similar project size, more production at a barely higher installation cost.
  Optimization for projects on sites with high albedo (deserts with sand, white roofs, gravel …)
  Synergy between rear-facing exposure and improved ventilation
  Aesthetic interest (barriers, canopies, pergolas, brise-soleil …)

PV solar Panel degradation and efficiency coefficient:-

LID and PID degradation factors:-

Another issue with PV panels is inaccurate energy forecast caused by Potential Induced Degradation (PID) and Light Induced Degradation (LID) mismatch.

Light Induced Degradation (LID) is done by PV modules with a natural degradation due to physical reactions (electrons flow) through the p-n junctions of a PV module. They induce a power degradation to the PV cell respective to the solar panels by a loss of 3% or more from the nameplate power generated, and in this way it lowers the overall panel efficiency.

The second form of degradation, PID is caused by voltages as high as 1000 V and above, together with high temperature and humidity. Furthermore, the accumulation of dirt and the degradation of glass can catalyze the process owing to the release of sodium ions. Modules that have experienced such degradation generally contain some black cells that are non-functional and found near the frame. This occurs due to a large flow of electrons through such cells, and due to the differential in voltage across the panel. Solid PID (Potential Induced Degradation) with high voltage resistance ensured by solar cell process optimization and careful module BOM selection, are mitigating the PV-cells respective PV-Panels degradations.

Read Article:   101 Renewable - PV Solar Panels and Electric Power Generation(PART 1)

About the author of this article:
View Michael Comsa's profile on LinkedIn

Visitor Comments
No visitor comments posted. Post a comment
Post Comment for "101 renewable - pv solar panels and electric power generation (part 2)"
To post a comment for this article, simply complete the form below. Fields marked with an asterisk are required.

   Your Name:
   Email Address:
* Your Comment:

* Enter the code below:
 

Related Articles
CEB-259
Attachments
No attachments were found.
Knowledge Management by Clean Energy Brands